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PhD position - Superconductor Integration for thermal management of quantum computing and spatial multi-chip platforms

PhD position - Superconductor Integration for thermal management of quantum computing and spatial multi-chip platforms

France 31 Oct 2021
CEA Tech

CEA Tech

State University (France), Browse similar opportunities

OPPORTUNITY DETAILS

Total reward
0 $
State University
Area
Host Country
Deadline
31 Oct 2021
Study level
Opportunity type
PhD
Specialities
Opportunity funding
Not funding
Eligible Countries
This opportunity is destined for all countries
Eligible Region
All Regions

SL-DRT-21-0411

RESEARCH FIELD

New computing paradigms, circuits and technologies, incl. quantum

ABSTRACT

As part of Quantum Silicon Grenoble project, teams at CEA-LETI, CEA-IRIG and Néel Institute aim at building a quantum accelerator with silicon spin quantum bits (qubits). Compatible with large-scale production, existing integration processes on Si are a real advantage for the scalability of these qubits. The extreme qubit operating conditions (cryogenic temperatures =1K, high frequencies in the range of a few GHz, high signal density) require the development of adapted technological building blocks. To interconnect the qubits and the controlled circuits, integration of superconducting metals is promising. Indeed, their vanishing resistance at low temperatures and the low thermal conductivity of superconductors also enables to protect the qubits from the heat generated by the control electronics circuits integrated close-by. Note that these developments will also benefit spatial applications sharing similar operating constraints. The thesis will focus on: 1) Studying the superconducting properties of Nb, NbN, TiN, Al and any combination of these materials during integration processes to optimize them for a single level of routing and multilayers pads. Establishing low temperature compatible thermal conductivity measurement set-up, protocol and sample design.2) Transferring the acquired knowledge in term of integration and thermal conductivities to develop the next generation of multi-chip platform hosting qubits and control electronics circuits. The PhD student will be part of the 3D integration and packaging lab of CEA-LETI (Grenoble) and will interact very closely with the Spectral-imaging laboratory for space science at CEA-IRFU (Saclay) for thermal conductivity measurements.

LOCATION

Département Composants Silicium (LETI)

Laboratoire Packaging et 3D

Grenoble

CONTACT PERSON

CHARBONNIER Jean

CEA

DRT/DCOS/SCMS/LP3D

CEA LETI MinatecLTPI17, rue des martyrs38054 Grenoble Cedex 9

Phone number: 0438785956

Email: jean.charbonnier@cea.fr

UNIVERSITY / GRADUATE SCHOOL

Paris Sciences et Lettres

Astronomie et Astrophysique d’Île de France

FIND OUT MORE

https://www.leti-cea.fr/cea-tech/leti/Pages/Accueil.aspx

https://www.quantumsilicon-grenoble.eu/

START DATE

Start date on 01-09-2021

THESIS SUPERVISOR

SAUVAGEOT Jean-Luc

CEA

DRF/IRFU/DAP/LSIS

CEA-SaclayDRF-IRFU-DAP91191 Gif-sur-Yvette CEDEX

Phone number: 0169088052

Email: jean-luc.sauvageot@cea.fr

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