PhD position - novel integrated circuit topologies using innovative capacitive components on silicon
CEA Tech

PhD position - novel integrated circuit topologies using innovative capacitive components on silicon

France 31 Oct 2021

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OPPORTUNITY DETAILS

State University
Area
Host Country
Deadline
31 Oct 2021
Study level
Opportunity type
PhD
Specialities
Eligible Countries
This opportunity is destined for all countries
Eligible Region
All Regions

SL-DRT-21-0814

RESEARCH FIELD

Emerging materials and processes for nanotechnologies and microelectronics

ABSTRACT

The objective of this thesis is to assess the potentiel of hybrid silicon capacitors developed at LETI as components in novel architectures of integrated energy conversion circuits. The hybrid capacitors exhibit a combination of unique properties in terms of energy density (ionic storage of the order of 40 mJ / mm3) and frequency response (dielectric storage demonstrated up to 30 GHZ), in addition to a technological realization on 200 mm silicon wafers.Within the framework of this project, it is proposed to design energy conversion circuits (eg. DC-DC converters)exploiting the intrinsic properties of the hybrid capacitors developed at LETI.

LOCATION

Département Composants Silicium (LETI)

Laboratoire Stockage et Microsources d Energie

Grenoble

CONTACT PERSON

OUKASSI Sami

CEA

DRT/DCOS//LSME

17 Av. des MartyrsGrenoble

Phone number: 0438782924

Email: sami.oukassi@cea.fr

UNIVERSITY / GRADUATE SCHOOL

Université Grenoble Alpes

Ecole Doctorale de Physique de Grenoble

FIND OUT MORE

https://www.linkedin.com/in/sami-oukassi-60066a4/?originalSubdomain=fr

https://www.linkedin.com/in/gaelpillonnet/?originalSubdomain=fr

START DATE

Start date on 01-10-2021

THESIS SUPERVISOR

PILLONNET Gael

CEA

DRT/DACLE//LGECA

Minatec Campus, 38054 Grenoble cedex 9, France

Phone number: 0438780215

Email: gael.pillonnet@cea.fr

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